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Title | Prospects of III-Vs for Logic Applications |
Authors |
Gomes, U.P.
Yadav, Y.K. Chowdhury, S. Ranjan, K. Rathi, S. Biswas, D. |
ORCID | |
Keywords |
CMOS III-V Materials HEMT Logic Digital |
Type | Article |
Date of Issue | 2012 |
URI | http://essuir.sumdu.edu.ua/handle/123456789/27780 |
Publisher | Сумський державний університет |
License | |
Citation | U.P. Gomes, Y.K. Yadav, S. Chowdhury, et al., J. Nano-Electron. Phys. 4 No 2, 02009 (2012) |
Abstract |
The increasing challenges for further scaling down of Si CMOS require the study of alternative channel materials. This paper highlights the significance of III-V compound semiconductor materials in order to face the looming fate of Si CMOS technology. The potential advantages of using III-Vs as channel materials for future III-V CMOS is its outstanding transport properties that have been widely accepted in high frequency RF applications. However, many significant challenges in front of III-V digital technology needs to be overcome before III-V CMOS becomes feasible for next generation high speed and low power logic applications. But it may be that this situation is changing given recent progress in the fabrication of high-mobility III-Vs based heterostructure electronic devices for logic applications to fulfill the needs towards the everyday evolving III-V CMOS technology.
When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/27780 |
Appears in Collections: |
Журнал нано- та електронної фізики (Journal of nano- and electronic physics) |
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