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Title Role of interface charges on high-k based poly-Si and aetal gate nano-scale MOSFETs
Authors Shashank, N.
Singh, V.
Taube, W.R.
Nahar, R.K.
ORCID
Keywords MOSFET
Interface charges
Metal gates
Type Article
Date of Issue 2011
URI http://essuir.sumdu.edu.ua/handle/123456789/27887
Publisher Видавництво СумДУ
License
Citation N. Shashank, Vikram Singh, W.R. Taube, R.K. Nahar, J. Nano- Electron. Phys. 3 No1, 937 (2011)
Abstract The characteristics of typical sub-100 nm high K gate dielectrics MOSFET with different gate materials are simulated by two dimensional device simulators (ATLAS and ATHENA). The impact of interface charges on the characteristics of Poly-Si and TiN metal gate MOSFETs are investigated. The simulation results shows that, at high interface charge densities, the devices with Poly-Si gate degrade much compared to metal gate MOSFET structures. Emphasis is given to study the mobility degradation which stands as a major hurdle with the implementation of high-k dielectrics in nano-scale devices. The advantages of using Watt model over other models for the extraction of channel mobility is also clearly explained. The performance of the high-k MOSFET with metal electrode and poly-silicon electrode is also compared for various interface state charges. When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/27887
Appears in Collections: Журнал нано- та електронної фізики (Journal of nano- and electronic physics)

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