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Title | Analysis of Voltage Transfer Characteristics of Nano-scale SOI CMOS Inverter with Variable Channel Length and Doping Concentration |
Authors |
Raj, A. Daniyel
Rajarajachozhan, C. Deb, Sanjoy |
ORCID | |
Keywords |
MOSFET SOI CMOS Inverter Voltage transfer characteristics |
Type | Article |
Date of Issue | 2015 |
URI | http://essuir.sumdu.edu.ua/handle/123456789/39047 |
Publisher | Sumy State University |
License | |
Citation | A. Daniyel Raj, C. Rajarajachozhan, Sanjoy Deb, J. Nano- Electron. Phys. 7 No 1, 01004 (2015) |
Abstract |
During many decades, continuous device performance improvement has been made possible only
through device scaling. But presently, due to aggressive scaling at the sub-micron or nanometer region, the
conventional planner silicon technology is suffering from the fundamental physical limits. Such imposed
limits on further downscaling of silicon planner technology have lead to alternative device technology like
Silicon-On-Insulator (SOI) technology. Due-to some of its inherent advantages, the Silicon-On-Insulator
(SOI) technology has reduced the Short-channel-effects (SCEs) and thus increased transistor scalability.
Till now, intense research interests have been paid in practical fabrication and theoretical modeling of SOI
MOSFETs but a little attention has been paid to understand the circuit level performance improvement
with nano-scale SOI MOSFETs. The circuit level performance analysis of SOI MOSFET is highly essential
to understand the impact of SOI technology on next level VLSI circuit and chip design and for doing so device
compact models are high on demand. In such scenario, under present research, a physics based compact
device model of SOI MOSFET has been developed. At the first phase of the compact model development,
a physics based threshold voltage model has been developed by solving 2-D Poisson’s equation at the
channel region and at the second phase, a current-voltage model has been developed with drift-diffusion
analysis. Different SCEs, valid at nano-scale, are effectively incorporated in threshold voltage and Current-Voltage
model. At the third phase, using the compact model, the Voltage Transfer Characteristics
(VTC) for a nano-scale SOI CMOS inverter has been derived with graphical analysis. The impacts of different
device parameters e.g.; channel length and channel doping concentration on VTC has been investigated
through simulation and the results have been analyzed. |
Appears in Collections: |
Журнал нано- та електронної фізики (Journal of nano- and electronic physics) |
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Raj.pdf | 228.06 kB | Adobe PDF | 47137048 |
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