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Title | Simulation and Performance Analysis of 32 nm FinFet based 4-Bit Carry Look Adder |
Authors |
Rashid, S.
Khan, S. Singh, A. |
ORCID | |
Keywords |
FinFET MOSFET ADDER 32 nm Technology Power Speed |
Type | Article |
Date of Issue | 2017 |
URI | http://essuir.sumdu.edu.ua/handle/123456789/65997 |
Publisher | Sumy State University |
License | Copyright not evaluated |
Citation | Rashid, S. Simulation and Performance Analysis of 32 nm FinFet based 4-Bit Carry Look Adder [Текст] / S. Rashid, S. Khan, A. Singh // Журнал нано- та електронної фізики. - 2017. - Т.9, № 5. - 05003. - DOI: 10.21272/jnep.9(5).05003. |
Abstract |
FinFET at 32 nm and beyond is an emerging transistor technology offer interesting delay–power
tradeoff. FinFETs are a necessary step in the evolution of semiconductors because bulk CMOS has difficulties
in scaling beyond 32 nm. Use of the back gate leads to very interesting design opportunities. Rich diversity
of design styles, made possible by independent control of FinFET gates, can be used effectively to
reduce total active power consumption IG/LP mode circuits provide an encouraging tradeoff between power
and area. In the research work FinFET and MOSFET based adders are simulated as these devices are
standout amongst the most generally actualized squares of microchip chips and advanced parts in the
computerized incorporated circuit outline. |
Appears in Collections: |
Журнал нано- та електронної фізики (Journal of nano- and electronic physics) |
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File | Size | Format | Downloads |
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Proof_JNEP_05003.pdf | 244.88 kB | Adobe PDF | 1977069023 |
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