Analog and RF Performance Evaluation of Dual Metal Double Gate High-k Stack (DMDG-HKS) MOSFETs

Abstract

Dual Metal Gate (DMG) technology was proposed to reduce the short channel effects (SCE’s) of double gate MOSFETs. But, DMG alone is not enough to rectify the problem of gate tunneling current due to thinning of oxide layer with device downscaling. So, the use of high-k dielectric as gate oxide is considered to overcome the gate tunneling effect. But, high gate dielectric thickness leads to higher fringing fields leading to undesirable higher gate capacitance. So, the use of oxide stack i.e. a combination of silicon dioxide and high-k dielectric material is preferred as gate oxide. This paper presents the evaluation of the analog performance of nMOS dual metal double gate with high-k oxide stack (DMDG-HKS) MOSFETs, comparing their performance with those exhibited by dual metal double gate (DMDG) transistors and single metal double gate (SMDG) transistors of identical dimensions. The analog performance has been investigated in subthreshold regime of operation by varying the channel length, gate oxide stack and considering different analog parameters extracted from the 2-D device simulations. It has been observed that the DMDG-HKS devices offer better transconductance gm, early voltage Va, intrinsic gain gm / gd, drain conductance gd, transconductance generation factor gm / Id, transition frequency fT, etc. The variation of these analog parameters has also been investigated by changing the equivalent oxide thickness (EOT) and channel length of the DMDG-HKS transistor and has been observed that above parameters tends to improve with channel length and EOT as well. When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/31940