Prospects of III-Vs for Logic Applications
dc.contributor.author | Gomes, U.P. | |
dc.contributor.author | Yadav, Y.K. | |
dc.contributor.author | Chowdhury, S. | |
dc.contributor.author | Ranjan, K. | |
dc.contributor.author | Rathi, S. | |
dc.contributor.author | Biswas, D. | |
dc.date.accessioned | 2012-08-27T12:46:41Z | |
dc.date.available | 2012-08-27T12:46:41Z | |
dc.date.issued | 2012 | |
dc.description.abstract | The increasing challenges for further scaling down of Si CMOS require the study of alternative channel materials. This paper highlights the significance of III-V compound semiconductor materials in order to face the looming fate of Si CMOS technology. The potential advantages of using III-Vs as channel materials for future III-V CMOS is its outstanding transport properties that have been widely accepted in high frequency RF applications. However, many significant challenges in front of III-V digital technology needs to be overcome before III-V CMOS becomes feasible for next generation high speed and low power logic applications. But it may be that this situation is changing given recent progress in the fabrication of high-mobility III-Vs based heterostructure electronic devices for logic applications to fulfill the needs towards the everyday evolving III-V CMOS technology. When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/27780 | ru_RU |
dc.identifier.citation | U.P. Gomes, Y.K. Yadav, S. Chowdhury, et al., J. Nano-Electron. Phys. 4 No 2, 02009 (2012) | ru_RU |
dc.identifier.uri | http://essuir.sumdu.edu.ua/handle/123456789/27780 | |
dc.language.iso | en | ru_RU |
dc.publisher | Сумський державний університет | ru_RU |
dc.rights.uri | cne | en_US |
dc.subject | CMOS | ru_RU |
dc.subject | III-V Materials | ru_RU |
dc.subject | HEMT | ru_RU |
dc.subject | Logic | ru_RU |
dc.subject | Digital | ru_RU |
dc.title | Prospects of III-Vs for Logic Applications | ru_RU |
dc.type | Article | ru_RU |