Please use this identifier to cite or link to this item: https://essuir.sumdu.edu.ua/handle/123456789/87761
Or use following links to share this resource in social networks: Recommend this item
Title FPGA-Implemented Fractal Decoder with Forward Error Correction in Short-Reach Optical Interconnects
Authors Matsenko, S.
Borysenko, Oleksii Andriiovych  
Spolitis, S.
Udalcovs, A.
Gegere, L.
Krotov, A.
Ozolins, O.
Bobrovs, V.
ORCID http://orcid.org/0000-0001-7466-9135
Keywords coded modulation
error-correcting codes
error-detecting codes
indivisible codes
fractal decoder
short-reach optical interconnects
Type Article
Date of Issue 2022
URI https://essuir.sumdu.edu.ua/handle/123456789/87761
Publisher MDPI
License Creative Commons Attribution 4.0 International License
Citation Matsenko, S.; Borysenko, O.; Spolitis, S.; Udalcovs, A.; Gegere, L.; Krotov, A.; Ozolins, O.; Bobrovs, V. FPGA-Implemented Fractal Decoder with Forward Error Correction in Short-Reach Optical Interconnects. Entropy 2022, 24, 122. https://doi.org/10.3390/e24010122
Abstract Forward error correction (FEC) codes combined with high-order modulator formats, i.e., coded modulation (CM), are essential in optical communication networks to achieve highly efficient and reliable communication. The task of providing additional error control in the design of CM systems with high-performance requirements remains urgent. As an additional control of CM systems, we propose to use indivisible error detection codes based on a positional number system. In this work, we evaluated the indivisible code using the average probability method (APM) for the binary symmetric channel (BSC), which has the simplicity, versatility and reliability of the estimate, which is close to reality. The APM allows for evaluation and compares indivisible codes according to parameters of correct transmission, and detectable and undetectable errors. Indivisible codes allow for the end-to-end (E2E) control of the transmission and processing of information in digital systems and design devices with a regular structure and high speed. This study researched a fractal decoder device for additional error control, implemented in field-programmable gate array (FPGA) software with FEC for short-reach optical interconnects with multilevel pulse amplitude (PAM-M) modulated with Gray code mapping. Indivisible codes with natural redundancy require far fewer hardware costs to develop and implement encoding and decoding devices with a sufficiently high error detection efficiency. We achieved a reduction in hardware costs for a fractal decoder by using the fractal property of the indivisible code from 10% to 30% for different n while receiving the reciprocal of the golden ratio.
Appears in Collections: Наукові видання (ЕлІТ)

Views

China China
1
Côte d’Ivoire Côte d’Ivoire
1
France France
1
Greece Greece
1
Indonesia Indonesia
1
Ireland Ireland
3436
Japan Japan
1
Latvia Latvia
1
Lithuania Lithuania
1
Singapore Singapore
8934793
Sweden Sweden
1
Turkey Turkey
1
Ukraine Ukraine
581212
United Kingdom United Kingdom
72224
United States United States
30776549
Unknown Country Unknown Country
30776550
Vietnam Vietnam
6864

Downloads

China China
581212
Germany Germany
17869589
Ireland Ireland
3435
Lithuania Lithuania
1
Singapore Singapore
1
Ukraine Ukraine
581213
United Kingdom United Kingdom
1
United States United States
30776547
Unknown Country Unknown Country
1
Vietnam Vietnam
6865

Files

File Size Format Downloads
Matsenko_et_al_FPGA_entropy.pdf 15.15 MB Adobe PDF 49818865

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.